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High Volume Manufacturing Readiness of DSA Process

Hyo Seon Suh is Professional DSA engineer working at IMEC with more than ten years of experience in nano-scale patterning with block copolymer thin films. After his PhD in Nano-Science and Technology at  Seoul National University (Korea), he worked as a post-doc inthe group of prof. Paul Nealey at University of Wisconsin (USA) and subsequently at University of Chicago (USA). In 2017 he joined IMEC (Belgium), where his main research focus is on problems related to the defectivity in DSA lithography.

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DSA pattern defect mitigation by process optimization 

Makoto Muramatsu is process engineer working at TEL on the development of altenative lithography technology for silicon processing. After graduation at Osaka Prefecture University, in 1995 he joined Tokyo Electron Kyushu, Ltd.  In 1997 he moved to  Tokyo Electron America, Inc., where he worked until 2011, when he came back to Tokyo Electron Kyushu, Ltd. He has a broad and deep experience in semiconductors and in particular on photolithography and process Integration.